View HFBR-5720L_240461.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Agilent HFBR-5720L/5720LP Fibre Channel 2.125/1.0625 GBd 850 nm Small Form Pluggable Low Voltage (3.3 V) Optical Transceiver
Data Sheet
Features * Compliant with 2.125 GBd Fibre Channel FC-PI standard * FC-PI 200-M5-SN-I for 50/125 m multimode cables * FC-PI 200-M6-SN-I for 62.5/125 m multimode cables * Compliant with 1.0625 GBd VCSEL operation for both 50/125 and 62.5/125 m multimode cables * Industry standard Small Form Pluggable (SFP) package * LC-Duplex connector optical interface * Link lengths at 2.125 GBd: 0.5 to 300 m - 50/125 m MMF 0.5 to 150 m - 62.5/125 m MMF * Link lengths at 1.0625 GBd: 0.5 to 500 m - 50/125 m MMF 0.5 to 300 m - 62.5/125 m MMF * Reliable 850 nm Vertical Cavity Surface Emitting Laser (VCSEL) source technology * Laser AEL Class 1 (eye safe) per: US 21 CFR (J) EN-60825-1 (+A11+A2) * Single 3.3 V power supply operation * De-latch options: - HFBR-5720L standard de-latch - HFBR-5720LP extended de-latch Applications * Mass storage system I/O * Computer system I/O * High speed peripheral interface * High speed switching systems * Host adapter I/O * RAID cabinets Related Products * HFBR-5602: 850 nm 5 V Gigabit Interface Converter (GBIC) for Fibre Channel FC-PH-2 * HFBR-53D3: 850 nm 5 V 1 x 9 laser transceiver for Fibre Channel FC-PH-2 * HFBR-5910E: 850 nm 3.3 V SFF laser transceiver for Fibre Channel FC-PH-2 * HDMP-2630/2631: 2.125/1.0625 Gbps TRx family of SerDes IC
Description The HFBR-5720L optical transceiver from Agilent Technologies offers maximum flexibility to Fibre Channel designers, manufacturers, and system integrators to implement a range of solutions for multimode Fibre Channel applications. In order to provide a wide range of system level performance, without the need for a data rate select input, this product is fully compliant with all equipment meeting the Fibre Channel FC-PI 200-M5-SN-I and 200-M6-SN-I 2.125 GBd specifications, and is compatible with the Fibre Channel FC-PI 100M5-SN-I and FC-PI 100-M6-SN-I, FC-PH2 100-M5-SN-I, and the FCPH2 100-M6-SN-I 1.0625 GBd specifications.
Module Package
allows the module to be installed at any time - even with the host system operating and on-line. This allows for system configuration changes or maintenance without system down time. The HFBR-5720L uses a reliable 850 nm VCSEL source and requires a 3.3 V DC power supply for optimal design.
Module Diagrams
Figure 1 illustrates the major functional components of the HFBR-5720L. The connection diagram of the module is shown in Figure 2. Figure 7 depicts the external configuration and dimensions of the module.
Installation
The transceiver meets the Small Form Pluggable (SFP) industry standard package utilizing an integral LC-Duplex optical interface connector. The hot-pluggable capability of the SFP package
The HFBR-5720L can be installed in or removed from any MultiSource Agreement (MSA)compliant Small Form Pluggable port regardless of whether the host equipment is operating or not. The module is simply inserted, electrical interface first, under finger pressure. Controlled
hot-plugging is ensured by design and by 3-stage pin sequencing at the electrical interface. The module housing makes initial contact with the host board EMI shield mitigating potential damage due to Electro-Static Discharge (ESD). The 3-stage pin
contact sequencing involves (1) Ground, (2) Power, and then (3) Signal pins, making contact with the host board surface mount connector in that order. This printed circuit board card-edge connector is depicted in Figure 2.
Serial Identification (EEPROM)
The HFBR-5720L complies with an industry standard MSA that defines the serial identification protocol. This protocol uses the 2-wire serial CMOS E2PROM protocol of the ATMEL AT24C01A or equivalent. The
HFBR-5720L BLOCK DIAGRAM RECEIVER
AMPLIFICATION & QUANTIZATION
ELECTRICAL INTERFACE
RD+ (RECEIVE DATA) RD- (RECEIVE DATA) LOSS OF SIGNAL
LIGHT FROM FIBER
PHOTO-DETECTOR
OPTICAL INTERFACE TRANSMITTER
LASER DRIVER & SAFETY CIRCUITRY Tx_DISABLE TD+ (TRANSMIT DATA) TD- (TRANSMIT DATA) Tx_FAULT
LIGHT TO FIBER
VCSEL
MOD-DEF2 EEPROM MOD-DEF1 MOD-DEF0
Figure 1. Transceiver functional diagram.
20 19 18 17 16 15 14 13 12 11
VEET TD- TD+ VEET VCCT VCCR VEER RD+ RD- VEER TOP OF BOARD
1 2 3 4 5 6 7 8 9 10
VEET TxFAULT Tx DISABLE MOD-DEF(2) MOD-DEF(1) MOD-DEF(0) RATE SELECT LOS VEER VEER
BOTTOM OF BOARD (AS VIEWED THROUGH TOP OF BOARD)
Figure 2. Connection diagram of module printed circuit board.
2
contents of the HFBR-5720L serial ID memory are defined in Table 10 as specified in the SFP MSA. Transmitter Section The transmitter section includes the transmitter optical subassembly (TOSA) and laser driver circuitry. The TOSA, containing an 850 nm VCSEL (Vertical Cavity Surface Emitting Laser) light source, is located at the optical interface and mates with the LC optical connector. The TOSA is driven by a custom silicon IC, which converts differential logic signals into an analog laser diode drive current. This Tx driver circuit regulates the optical power at a constant level provided the data pattern is valid 8B/10B balanced code.
Tx Disable
Tx Fault
The HFBR-5720L module features a transmit fault control signal output which when high indicates a laser transmit fault has occurred and when low indicates normal laser operation. A transmitter fault condition can be caused by deviations from the recommended module operating conditions or by violation of eye safety conditions. A fault is cleared by cycling the Tx Disable control input.
Eye Safety Circuit
includes a loss of signal (LOS) detection circuit which provides an open collector logic high output in the absence of a usable input optical signal level.
Loss of Signal
For an optical transmitter device to be eye-safe in the event of a single fault failure, the transmitter will either maintain normal eye-safe operation or be disabled. In the event of an eye safety fault, the VCSEL will be disabled. Receiver Section The receiver section includes the receiver optical subassembly (ROSA) and amplification/ quantization circuitry. The ROSA, containing a PIN photodiode and custom transimpedance preamplifier, is located at the optical interface and mates with the LC optical connector. The ROSA is mated to a custom IC that provides post-amplification and quantization. This circuit also
The Loss of Signal (LOS) output indicates that the optical input signal to the receiver does not meet the minimum detectable level for Fibre Channel compliant signals. When LOS is high it indicates loss of signal. When LOS is low it indicates normal operation. The Loss of Signal thresholds are set to indicate a definite optical fault has occurred (e.g., disconnected or broken fiber connection to receiver, failed transmitter).
Functional Data I/O
The HFBR-5720L accepts a transmit disable control signal input which shuts down the transmitter. A high signal implements this function while a low signal allows normal laser operation. In the event of a fault (e.g., eye safety circuit activated), cycling this control signal resets the module as depicted in Figure 6. The Tx Disable control should be actuated upon initialization of the module.
Agilent's HFBR-5720L fiber-optic transceiver is designed to accept industry standard differential signals. In order to reduce the number of passive components required on the customer's board, Agilent has included the functionality of the transmitter bias resistors and coupling capacitors within the fiber optic module. The transceiver is compatible with an "AC-coupled" configuration and is internally terminated. Figure 1 depicts the functional diagram of the HFBR5720L.
NORMALIZED AMPLITUDE
1.3 1.0 0.8 0.5 0.2 0 -0.2 0 x1 0.4 0.6 1-x1 1.0
NORMALIZED TIME
Figure 3. Transmitter eye mask diagram and typical transmitter eye.
3
Caution should be taken for the proper interconnection between the supporting Physical Layer integrated circuits and the HFBR5720L. Figure 4 illustrates the recommended interface circuit. Several MSA compliant control data signals are implemented in the module and are depicted in Figure 6. Application Support
Evaluation Kit
To help you in your preliminary transceiver evaluation, Agilent offers a 2.125 GBd Fibre Channel evaluation board. This board will allow testing of the fiber-optic VCSEL transceiver. Please contact your local field sales representative for availability and ordering details.
Reference Designs
Reference designs for the HFBR5720L fiber-optic transceiver and the HDMP-2630/2631 physical layer IC are available to assist the equipment designer. Figure 4 depicts a typical application configuration, while Figure 5 depicts the MSA power supply filter circuit design. All artwork is available at the Agilent Website. Please contact your local field sales engineer for more information regarding application tools. Regulatory Compliance See Table 1 for transceiver Regulatory Compliance performance. The overall equipment design will determine the certification level. The transceiver performance is offered as a figure of merit to assist the designer.
Electrostatic Discharge (ESD)
conditions. The first condition is during handling of the transceiver prior to insertion into the transceiver port. To protect the transceiver, it is important to use normal ESD handling precautions. These precautions include using grounded wrist straps, work benches, and floor mats in ESD controlled areas. The ESD sensitivity of the HFBR5720L is compatible with typical industry production environments. The second condition is static discharges to the exterior of the host equipment chassis after installation. To the extent that the duplex LC optical interface is exposed to the outside of the host equipment chassis, it may be subject to system-level ESD requirements. The ESD performance of the HFBR-5720L exceeds typical industry standards.
Immunity
of the overall system EMI perfornmance.
Eye Safety
These 850 nm VCSEL-based transceivers provide Class 1 eye safety by design. Agilent Technologies has tested the transceiver design for compliance with the requirements listed in Table 1 under normal operating conditions and under a single fault condition.
Flammability
The HFBR-5720L VCSEL transceiver housing is made of metal and high strength, heat resistant, chemically resistant, and UL 94V-0 flame retardant plastic. Caution There are no user serviceable parts nor any maintenance required for the HFBR-5720L. Tampering with or modifying the performance of the HFBR-5720L will result in voided product warranty. It may also result in improper operation of the HFBR5720L circuitry, and possible overstress of the laser source. Device degradation or product failure may result. Connection of the HFBR-5720L to a nonapproved optical source, operating above the recommended absolute maximum conditions or operating the HFBR-5720L in a manner inconsistent with its design and function may result in hazardous radiation exposure and may be considered an act of modifying or manufacturing a laser product. The person(s) performing such an act is required by law to re-certify and re-identify the laser product under the provisions of U.S. 21 CFR (Subchapter J) and the TUV. Ordering Information Please contact your local field sales engineer or one of the
Equipment hosting the HFBR5720L modules will be subjected to radio-frequency electromagnetic fields in some environments. These transceivers have good immunity to such fields due to their shielded design.
Electromagnetic Interference (EMI)
Most equipment designs utilizing these high-speed transceivers from Agilent Technologies will be required to meet the requirements of FCC in the United States, CENELEC EN55022 (CISPR 22) in Europe and VCCI in Japan. The metal housing and shielded design of the HFBR-5720L minimize the EMI challenge facing the host equipment designer. These transceivers provide superior EMI performance. This greatly assists the designer in the management
There are two conditions in which immunity to ESD damage is important. Table 1 documents our immunity to both of these 4
Agilent Technologies franchised distributors for ordering information. For additional technical information associated with this product, including the MSA, please visit Agilent Technologies Semiconductor Products Website at www.agilent.com/view/fiber Use the Quick Search feature to search for this part number. Agilent Technologies Semiconductor Products Customer Response Center is also available to assist you at 1-800-235-0312.
Table 1. Regulatory Compliance Feature Electrostatic Discharge (ESD) to the Electrical Pins Electrostatic Discharge (ESD) to the Duplex LC Receptacle Test Method MIL-STD-883C Method 3015.4 Variation of IEC 61000-4-2 Performance Class 2 (>2000 Volts) Typically withstand at least 25 kV without damage when the duplex LC connector receptacle is contacted by a Human Body Model probe. System margins are dependent on customer board and chassis design.
Electromagnetic Interference (EMI)
Immunity
FCC Class B CENELEC EN55022 Class B (CISPR 22A) VCCI Class 1 Variation of IEC 61000-4-3
Eye Safety
US FDA CDRH AEL Class 1
Typically shows a negligible effect from a 10 V/m field swept from 80 to 1000 MHz applied to the transceiver without a chassis enclosure. CDRH File # 9720151-16 (HFBR-5720L) CDRH File # Pending (HFBR-5720LP)
Note 1 Component Recognition
EN 60950 Class 1 EN (IEC) 60825-1:1994+A11+A2 TUV File # E2171216.01 (HFBR-5720L) EN (IEC) 60825-2:1994+A1 TUV File # Pending (HFBR-5720LP) Underwriters Laboratories and UL file # E173874 Canadian Standards Association Joint Component Recognition for Information Technology Equipment Including Electrical Business Equipment
Note: 1. Units manufactured prior to August 1, 2001 were certified to the previous TUV standard EN60825-1:1994+A11.
5
1 H 3.3 V 10 F 0.1 F 1 H
3.3 V VCC,T 0.1 F 4.7 K to 10 K GP04 Tx_FAULT VREFR VREFR TX[0:9] SO- TBC EWRAP TBC EWRAP SO+ 50 50 Tx_DISABLE Tx_FAULT TD+ 0.01 F 100 TD- TX GND 0.01 F VCC,R LASER DRIVER & SAFETY CIRCUITRY 4.7 K to 10 K
HFBR-5720L/LP
PROTOCOL IC
RBC Rx_RATE
HDMP-2630/31
RX[0:9] RBC Rx_RATE REFCLK SI+ SI-
4.7 K to 10 K 10 F 50 50
0.1 F RD+
0.01 F 100 AMPLIFICATION & QUANTIZATION
RD- Rx_LOS RX GND 0.01 F
Rx_LOS
GPIO(X) GPIO(X) GP14 REFCLK 4.7 K to 10 K 4.7 K to 10 K
MOD_DEF2 MOD_DEF1 MOD_DEF0 4.7 K to 10 K EEPROM
106.25 MHz
3.3 V
Figure 4. Recommended application configuration.
1 H VCCT 0.1 F
1 H VCCR 0.1 F 10 F 0.1 F 10 F 3.3 V
SFP MODULE
HOST BOARD
NOTE: INDUCTORS MUST HAVE LESS THAN 1 SERIES RESISTANCE PER MSA.
Figure 5. MSA required power supply filter.
6
Table 2. Pin Description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Name Vee T Tx Fault Tx Disable MOD-DEF2 MOD-DEF1 MOD-DEF0 Rate Select LOS Vee R Vee R Vee R RD- RD+ Vee R VCCR VCCT Vee T TD+ TD- Vee T Function/Description Transmitter Ground Transmitter Fault Indication - High Indicates a Fault Transmitter Disable - Module Disables on High or Open Module Definition 2 - Two Wire Serial ID Interface Module Definition 1 - Two Wire Serial ID Interface Module Definition 0 - Grounded in Module Not Connected Loss of Signal - High Indicates Loss of Signal Receiver Ground Receiver Ground Receiver Ground Inverse Received Data Out Received Data Out Receiver Ground Receiver Power - 3.3 V +/- 5% Transmitter Power - 3.3 V +/- 5% Transmitter Ground Transmitter Data In Inverse Transmitter Data In Transmitter Ground MSA Notes Note 1 Note 2 Note 3 Note 3 Note 3 Note 4
Note 5 Note 5 Note 6 Note 6 Note 7 Note 7
Notes: 1. Tx Fault is an open collector/drain output which should be pulled up externally with a 4.7 K - 10 K resistor on the host board to a supply < VCC T+0.3 V or VCCR+0.3 V. When high, this output indicates a laser fault of some kind. Low indicates normal operation. In the low state, the output will be pulled to < 0.8 V. 2. Tx disable input is used to shut down the laser output per the state table below. It is pulled up within the module with a 4.7 K - 10 K resistor. Low (0 - 0.8 V): Transmitter On Between (0.8 V and 2.0 V): Undefined High (2.0 - 3.465 V): Transmitter Disabled Open: Transmitter Disabled 3. Mod-Def 0,1,2. are the module definition pins. They should be pulled up with a 4.7 K - 10 K resistor on the host board to a supply less than VCC T+0.3 V or VCC R+0.3 V. Mod-Def 0 is grounded by the module to indicate that the module is present Mod-Def 1 is clock line of two wire serial interface for optional serial ID Mod-Def 2 is data line of two wire serial interface for optional serial ID 4. LOS (Loss of Signal) is an open collector/drain output which should be pulled up externally with a 4.7 K - 10 K resistor on the host board to a supply < V CCT, R+0.3 V. When high, this output indicates the received optical power is below the worst case receiver sensitivity (as defined by the standard in use). Low indicates normal operation. In the low state, the output will be pulled to < 0.8 V. 5. RD-/+: These are the differential receiver outputs. They are AC coupled 100 differential lines which should be terminated with 100 differential at the user SERDES. The AC coupling is done inside the module and is thus not required on the host board. The voltage swing on these lines will be between 400 and 2400 mV differential (200 - 1200 mV single ended) when properly terminated. 6. VCC R and VCCT are the receiver and transmitter power supplies. They are defined as 3.135 - 3.465 V at the SFP connector pin. The maximum supply current is 200 mA and the associated in-rush current will typically be no more than 30 mA above steady state after 500 nanoseconds. 7. TD-/+: These are the differential transmitter inputs. They are AC coupled differential lines with 100 differential termination inside the module. The AC coupling is done inside the module and is thus not required on the host board. The inputs will accept differential swings of 500 - 2400 mV (250 - 1200 mV single ended), though it is recommended that values between 500 and 1200 mV differential (250 - 600 mV single ended) be used for best EMI performance. These levels are compatible with CML and LVPECL voltage swings.
7
Table 3. Absolute Maximum Ratings Parameter Storage Temperature Case Temperature Relative Humidity Module Supply Voltage Data/Control Input Voltage Sense Output Current - LOS, Tx Fault MOD-DEF 2 Symbol TS TC RH VCCT,R VI ID ID Minimum -40 0 5 -0.5 -0.5 Typical Maximum 100 85 95 3.6 VCC+0.3 150 5.0 Unit C C % V V mA mA Notes Note 1 Note 1, 2 Note 1 Note 1 Note 1 Note 1 Note 1
Notes: 1. Absolute Maximum Ratings are those values beyond which damage to the device may occur if these limits are exceeded for other than a short period of time. See Reliability Data Sheet for specific reliability performance. 2. Between Absolute Maximum Ratings and the Recommended Operating Conditions functional performance is not intended, device reliability is not implied, and damage to the device may occur over an extended period of time.
Table 4. Recommended Operating Conditions Parameter Case Temperature Module Supply Voltage Data Rate Symbol TC VCCT,R Minimum 0 3.135 Typical 3.3 1.0625 2.125 Maximum 70 3.465 Unit C V Gb/s Notes Note 1 Note 1 Note 1
Note: 1. Recommended Operating Conditions are those values outside of which functional performance is not intended, device reliability is not implied, and damage to the device may occur over an extended period of time. See Reliability Data Sheet for specific reliability performance.
Table 5. Transceiver Electrical Characteristics (TC = 0C to 70C, VCCT,R = 3.3 V 5%) Parameter Symbol AC Electrical Characteristics Power Supply Noise PSNR Rejection (peak-to-peak) DC Electrical Characteristics Module Supply Current ICC Power Dissipation PDISS Sense Outputs: Transmit Fault VOH (TX_FAULT), Loss of Signal (LOS), VOL MOD-DEF 2 Control Inputs: Transmitter Disable VIH (TX_DISABLE) MOD-DEF 1,2 VIL Minimum Typical 100 Maximum Unit mV Notes Note 1
133 440 2.0
200 693 VCCT, R+0.3 0.8
mA mW V V Note 2
2.0 0
VCCT,R 0.8
V V
Note 3
Notes: 1. MSA filter is required on host board 10 Hz to 2 MHz. 2. LVTTL, external 4.7 - 10 K pull-up resistor required. 3. LVTTL, external 4.7 - 10 K resistor required for MOD-DEF 1 and MOD-DEF 2.
8
Table 6. Transmitter and Receiver Electrical Characteristics (TC = 0C to 70C, VCCT,R = 3.3 V 5%) Parameter Data Input: Transmitter Differential Input Voltage (TD +/-) Data Output: Receiver Differential Output Voltage (RD +/-) Contributed Deterministic Jitter (Receiver) 2.125 Gb/s Contributed Deterministic Jitter (Receiver) 1.0625 Gb/s Contributed Random Jitter (Receiver) 2.125 Gb/s Contributed Random Jitter (Receiver) 1.0625 Gb/s Receive Data Rise and Fall Times (Receiver) Symbol V1 Minimum 400 Typical Maximum 2400 Unit mV Notes Note 1
VO DJ DJ RJ RJ Trf
400
735
2000 0.1 47 0.12 113 0.162 76 0.098 92 250
mV UI ps UI ps UI ps UI ps ps
Note 2 Note 3, 6 Note 3, 6 Note 4, 6 Note 4, 6 Note 5
Notes: 1. Internally AC coupled and terminated (100 Ohm differential). These levels are compatible with CML and LVPECL voltage swings. 2. Internally AC coupled with an external 100 Ohm differential load termination. 3. Contributed DJ is measured on an oscilloscope in average mode with 50% threshold and K28.5 pattern. 4. Contributed RJ is calculated for 1 x 10-12 BER by multiplying the RMS jitter (measured on a single rise or fall edge) from the oscilloscope by 14. Per the FC-PI standard (Table 13 - MM Jitter Output, note 1), the actual contributed RJ is allowed to increase above its limit if the actual contributed DJ decreases below its limits, as long as the component output DJ and TJ remain within their specified FC-PI maximum limits with the worst case specified component jitter input. 5. 20%-80% Rise and Fall times measured with a 500 MHz signal utilizing a 1010 data pattern. 6. In a network link, each component`s output jitter equals each component`s input jitter combined with each component`s contributed jitter. Contributed DJ adds in a linear fashion and contributed RJ adds in a RMS fashion. In the Fibre Channel FC-PI Rev 11 specification "6.3.3 MM Jitter Budget" section, there is a table specifying the input and output DJ and TJ for the receiver at each data rate. In that table, RJ is found from TJ - DJ where the Rx input jitter is noted as Gamma R and the Rx output jitter is noted as Delta R. Our component contributed jitter is such that, if the maximum specified input jitter is present, and is combined with our maximum contributed jitter, then we meet the specified maximum output jitter in the FC-PI MM jitter specification table.
9
Table 7. Transmitter Optical Characteristics (TC = 0C to 70C, VCCT,R = 3.3 V 5%) Parameter Output Optical Power (Average) Symbol Pout Pout Optical Extinction Ratio Optical Modulation Amplitude (Peak-to-Peak) 2.125 Gb/s Optical Modulation Amplitude (Peak-to-Peak) 1.0625 Gb/s Center Wavelength Spectral Width - rms Optical Rise/Fall Time RIN12 (OMA), maximum Contributed Deterministic Jitter (Transmitter) 2.125 Gb/s Contributed Deterministic Jitter (Transmitter) 1.0625 Gb/s Contributed Random Jitter (Transmitter) 2.125 Gb/s Contributed Random Jitter (Transmitter) 1.0625 Gb/s Pout TX_DISABLE Asserted ER OMA Minimum -10 -10 Typical -6.3 -6.2 9 392 Maximum -1.5 -1.5 Unit dBm dBm dB W Notes 50/125 um, NA = 0.2 62.5/125 um, NA = 0.275 FC-PI Std Note 1 FC-PI Std Note 2 FC-PI Std FC-PI Std 20% - 80%, FC-PI Std FC-PI Std Note 3, 5 Note 3, 5 Note 4, 5 Note 4, 5
196
OMA
156
350
W
C Trise/fall RIN DJ DJ RJ RJ POFF
830
860 0.85 150 -117 0.12 56 0.09 85 0.134 63 0.177 167 -35
nm nm ps dB/Hz UI ps UI ps UI ps UI ps dBm
Notes: 1. An OMA of 196 is approximately equal to an average power of -9 dBm assuming an Extinction Ratio of 9 dB. 2. An OMA of 156 is approximately equal to an average power of -10 dBm assuming an Extinction Ratio of 9 dB. 3. Contributed DJ is measured on an oscilloscope in average mode with 50% threshold and K28.5 pattern. 4. Contributed RJ is calculated for 1 x 10-12 BER by multiplying the RMS jitter (measured on a single rise or fall edge) from the oscilloscope by 14. Per the FC-PI standard (Table 13 - MM Jitter Output, note 1), the actual contributed RJ is allowed to increase above its limit if the actual contributed DJ decreases below its limits, as long as the component output DJ and TJ remain within their specified FC-PI maximum limits with the worst case specified component jitter input. 5. In a network link, each component`s output jitter equals each component`s input jitter combined with each component`s contributed jitter. Contributed DJ adds in a linear fashion and contributed RJ adds in a RMS fashion. In the Fibre Channel FC-PI Rev 11 specification "6.3.3 MM Jitter Budget" section, there is a table specifying the input and output DJ and TJ for the receiver at each data rate. In that table, RJ is found from TJ - DJ where the Rx input jitter is noted as Gamma R and the Rx output jitter is noted as Delta R. Our component contributed jitter is such that, if the maximum specified input jitter is present, and is combined with our maximum contributed jitter, then we meet the specified maximum output jitter in the FC-PI MM jitter specification table.
10
Table 8. Receiver Optical Characteristics (TC = 0C to 70C, VCCT,R = 3.3 V 5%) Parameter Optical Power Min. Optical Modulation Amplitude (Peak-to-Peak) 2.125 Gb/s Min. Optical Modulation Amplitude (Peak-to-Peak) 1.0625 Gb/s Stressed Receiver Sensitivity (OMA) 2.125 Gb/s Symbol PIN OMA OMA Minimum 49 31 96 109 Typical 16 18 33 25 Maximum 0 Unit dBm W W W W Notes FC-PI Std FC-PI Std Note 1 FC-PI Std Note 2 50 m fiber, FC-PI Std 62.5 m fiber, FC-PI Std Note 3 50 m fiber, FC-PI Std 62.5 m fiber, FC-PI Std Note 4 FC-PI Std Note 5 Note 5
Stressed Receiver Sensitivity (OMA) 1.0625 Gb/s
55 67
19 16
W W
Return Loss Loss of Signal - Assert Loss of Signal - De-Assert Loss of Signal Hysteresis
PA PD PD-P A
12 -31 0.5 2.3
-17.5 -17.0 5
dB dBm dBm dB
Notes: 1. An OMA of 49 W is approximately equal to an average power of -15 dBm, and the OMA typical of 16 W is approximately equal to an average power of -20 dBm, assuming an Extinction Ratio of 9 dB. Sensitivity measurements are made at eye center with a BER = 10E-12. 2. An OMA of 31 is approximately equal to an average power of -17 dBm assuming an Extinction Ratio of 9 dB. 3. 2.125 Gb/s Stressed receiver vertical eye closure penalty (ISI) min. is 1.26 dB for 50 m fiber and 2.03 dB for 62.5 m fiber. Stressed receiver DCD component min. (at TX) is 40 ps. 4. 1.0625 Gb/s Stressed receiver vertical eye closure penalty (ISI) min. is 0.96 dB for 50 m fiber and 2.18 dB for 62.5 m fiber. Stressed receiver DCD component min. (at TX) is 80 ps. 5. These average power values are specified with an Extinction Ratio of 9 dB. The loss of Signal circuitry responds to OMA (peak to peak) power, not to average power.
Table 9. Transceiver Timing Characteristics (TC = 0C to 70C, VCCT,R = 3.3 V 5%) Parameter Tx Disable Assert Time Tx Disable Negate Time Time to Initialize, Including Reset of Tx_Fault Tx Fault Assert Time Tx Disable to Reset LOS Assert Time LOS Deassert Time Serial ID Clock Rate Symbol t_off t_on t_init t_fault t_reset t_loss_on t_loss_off f-serial-clock Minimum Maximum 10 1 300 100 10 100 100 100 Unit s ms ms s s s s kHz Notes Note 1 Note 2 Note 3 Note 4 Note 5 Note 6 Note 7
Notes: 1. Time from rising edge of Tx Disable to when the optical output falls below 10% of nominal. 2. Time from falling edge of Tx Disable to when the modulated optical output rises above 90% of nominal. 3. From power on or negation of Tx Fault using Tx Disable. 4. Time from fault to Tx fault on. 5. Time Tx Disable must be held high to reset Tx_Fault. 6. Time from LOS transition to Rx LOS assert per Figure 6. 7. Time from non-LOS transition to Rx LOS deassert per Figure 6.
11
VCC > 3.15 V Tx_FAULT Tx_DISABLE TRANSMITTED SIGNAL t_init
VCC > 3.15 V Tx_FAULT Tx_DISABLE TRANSMITTED SIGNAL t_init
t-init: TX DISABLE NEGATED
t-init: TX DISABLE ASSERTED
VCC > 3.15 V Tx_FAULT Tx_DISABLE TRANSMITTED SIGNAL
Tx_FAULT Tx_DISABLE TRANSMITTED SIGNAL t_off t_init t_on
INSERTION
t-init: TX DISABLE NEGATED, MODULE HOT PLUGGED
t-off & t-on: TX DISABLE ASSERTED THEN NEGATED
OCCURANCE OF FAULT Tx_FAULT Tx_DISABLE TRANSMITTED SIGNAL t_fault
OCCURANCE OF FAULT Tx_FAULT Tx_DISABLE TRANSMITTED SIGNAL
t_reset t_init*
t-fault: TX FAULT ASSERTED, TX SIGNAL NOT RECOVERED
t-reset: TX DISABLE ASSERTED THEN NEGATED, TX SIGNAL RECOVERED
OCCURANCE OF FAULT Tx_FAULT Tx_DISABLE TRANSMITTED SIGNAL t_fault t_reset * SFP SHALL CLEAR Tx_FAULT IN t_init IF THE FAILURE IS TRANSIENT t_init* OPTICAL SIGNAL LOS
t_loss_on t_loss_off
OCCURANCE OF LOSS
t-fault: TX DISABLE ASSERTED THEN NEGATED, TX SIGNAL NOT RECOVERED
t-loss-on & t-loss-off
Figure 6. Transceiver timing diagrams (module installed except where noted).
12
Table 10. EEPROM Serial ID Memory Contents Address 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 Hex 03 04 07 00 00 00 00 20 40 0C 05 01 15 00 00 00 1E 0F 00 00 41 47 49 4C 45 4E 54 20 20 20 20 20 20 20 20 20 00 00 30 D3 ASCII Address 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 Hex 48 46 42 52 2D 35 37 32 30 4C 20 20 20 20 20 20 20 20 20 20 00 00 00 Note 3 00 1A 00 00 ASCII H F B R - 5 7 2 0 L Address 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 Hex Note 1 Note 1 Note 1 Note 1 Note 1 Note 1 Note 1 Note 1 Note 1 Note 1 Note 1 Note 1 Note 1 Note 1 Note 1 Note 1 Note 2 Note 2 Note 2 Note 2 Note 2 Note 2 Note 2 Note 2 00 00 00 Note 3 ASCII Address 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 Hex ASCII
A G I L E N T
Notes: 1. Address 61-83 specify a unique identifier. 2. Address 84-91 specify the date code. 3. Addresses 63 and 95 are check sums. Address 63 is the check sum for bytes 0-62 and address 95 is the check sum for bytes 64-94.
13
AGILENT HFBR-5720L 850 nm LASER PROD 21CFR(J) CLASS 1 COUNTRY OF ORIGIN YYWW XXXXXX
13.40 0.1 (0.53 0.004)
13.75 0.1 (0.54 0.004)
56.40 0.2 (2.22 0.01)
SEE DETAIL 1
TCASE REFERENCE POINT
AREA FOR PROCESS PLUG
13.0 0.1 (0.51 0.004)
14.8 MAX. UNCOMPRESSED (0.58)
14.20 0.1 (0.56 0.004) DETAIL 1 SCALE 2x
0.7 MAX. UNCOMPRESSED (0.03)
FRONT EDGE OF SFP TRANSCEIVER CAGE
6.25 0.05 (0.25 0.002)
8.50 0.1 (0.33 0.004)
11.80 0.2 (0.46 0.008)
DIMENSIONS ARE IN MILLIMETERS (INCHES)
TX
RX
Figure 7a. Module drawing.
14
Y
X 34.5 10 3x 10x 1.05 0.01 0.1 L X A S 1 B 7.2 2.5 2.5 7.1 0.85 0.05 0.1 S X Y A 1 3.68
16.25 MIN. PITCH PCB EDGE
5.68 8.58 11.08 16.25 REF. 14.25
PIN 1
20
2x 1.7
8.48 9.6 11.93
10
11
4.8
SEE DETAIL 1 2.0 11x 26.8 3 41.3 42.3 10 3x 5 11x 2.0 9x 0.95 0.05 0.1 L X A S 2
5 3.2 0.9 20x 0.5 0.03 0.06 L A S B S
PIN 1
20
LEGEND 10.53 11.93 1.PADS AND VIAS ARE CHASSIS GROUND 2.THROUGH HOLES, PLATING OPTIONAL
10.93 9.6 0.8 TYP.
11 10
3.HATCHED AREA DENOTES COMPONENT AND TRACE KEEPOUT (EXCEPT CHASSIS GROUND) 2 0.005 TYP. 0.06 L A S B S 4.AREA DENOTES COMPONENT KEEPOUT (TRACES ALLOWED) DIMENSIONS ARE IN MILLIMETERS
4 2x 1.55 0.05 0.1 L A S B S
DETAIL 1
Figure 7b. SFP host board mechanical layout.
15
1.7 0.9 (0.07 0.04) 3.5 0.3 (0.14 0.01) 41.73 0.5 (1.64 0.02)
PCB
BEZEL
15 MAX. (0.59)
AREA FOR PROCESS PLUG
CAGE ASSEMBLY 15.25 0.1 (0.60 0.004) 11 REF. (0.43) 9.8 MAX. (0.39) 1.5 REF. (0.06) BELOW PCB 10 REF (0.39) TO PCB 0.4 0.1 (0.02 0.004) BELOW PCB 10.4 0.1 (0.41 0.004)
16.25 0.1 MIN. PITCH (0.64 0.004)
MSA-SPECIFIED BEZEL
DIMENSIONS ARE IN MILLIMETERS (INCHES).
Figure 7c. Assembly drawing.
www.semiconductor.agilent.com Data subject to change. Copyright (c) 2001 Agilent Technologies, Inc. August 20, 2001 Obsoletes 5988-0967EN 5988-3490EN

▲Up To Search▲

Price & Availability of HFBR-5720L

	To Download HFBR-5720L Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .